Use of PCIe Features in Communications Systems

A number of features at the physical and data link layers of the PCIe protocol can be used to enhance the availability of a communications system. PCI Express packets are protected by a link-layer cyclic redundancy check (CRC) and sequence number when moving between two entities. The bus also provides an optional end-to-end CRC capability to supply an extra layer of data integrity protection. As another related option, an advanced error reporting capability can help isolate the location of any failure.

Additionally, any PCIe link that consists of multiple PCIe lanes, such as an x8 width link, supports automatic lane reversal. This feature allows the user to define if Lane 0 is on the logical left or logical right of the link and is very helpful in preventing the “crossover” of traces when laying out a PCB. This capability is especially important in modular systems like those often used in communications applications, because it supports optimal layouts on individual modules, rather than forcing designers to comply with the same link order. 

To this end, PCIe also supports automatic polarity reversal. In communications systems, these features may also prove useful in the reduction of signal coupling on dense backplane layouts. PCIe links also support automatic link width negotiation.

Gigabit PF Single Port Server Adapter

When a link is brought up, the two ends exchange packets to train the link for optimal signal propagation. As part of this process, the two end points also agree on the number of lanes they will support across the link. This capability is very useful when supporting a range of optional plug-in modules that may require different link widths. Unused lanes are powered down once the negotiation is completed. However, it is important to note that the PCIe specification only requires a device to negotiate to full width or an x1 width. Other intermediate widths are optional.

Communications systems designers can use this feature, in conjunction with auto-lane reversal, to permit the system to continue to operate in the presence of a failure of a single lane within a link.  The link can be reset and automatically negotiate to use the half of the link that remains usable. While this feature utilizes only half the bandwidth, it does provide an open channel for recovery of key information or for partial functioning of the module.

Finally, PCI Express also provides a link-level retry capability. This function retries the transfer of packets between two adjacent PCIe devices without any intervention of higher level software when an error or a lost acknowledgement occurs.

I/O virtualization extensions

The PCI special interest group (SIG) is defining some extensions to the PCI family of specifications that will allow multiple independent CPUs to share I/O resources. These new capabilities will be extremely useful in blade server applications by allowing each CPU blade in the system, for example, to operate as if it has sole control of an expensive storage area network (SAN interface), when in fact, that interface is shared by all CPUs in the system. Since most communications systems dedicate I/O to individual CPUs, or a group of CPUs cooperatively shares resources, these I/O virtualization extensions to PCIe will probably not be widely used in the communications infrastructure.

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